Non-volatile memory (NVM) is a type of memory that does not loose stored information even when the power is not applied. Flash memory is a typical type of non-volatile memory. That is, the flash memory is able to keep the stored information even the electric power is wined off. While the stored information in volatile memory, such as dynamic random access memory (DRAM), or static random access memory, etc., is lost when the electric power is turned off. Comparing with other types of memories, the flashing memory has distinct advantages. For example, comparing with the erasable programmable read only memory (EPROM), the flash memory is electrically erasable and repeatedly programmable; and it does not require a special high power source although some of the first generation flash memories do. Further, comparing with the electrically erasable programmable read only memory (EEPROM), the flash memory has advantages including low cost, and high density, etc.
FIG. 1 illustrates an existing fabrication process of a flash memory device. As shown in FIG. 1, the process includes providing a semiconductor substrate; and forming a hard mask layer having a plurality of first openings exposing the surface of the semiconductor substrate the surface of the semiconductor substrate (S101). The method also includes forming a plurality of trenches in the semiconductor substrate by etching the semiconductor substrate along the first openings (S102). Further, the method includes forming shallow trench isolation structures by filling an isolation material in the trenches (S103). Further, the method also includes forming second openings exposing the surface of the semiconductor substrate between adjacent first openings by removing the hard mask layer (S104). Further, the method also includes forming a tunnel oxide layer on the surface of the semiconductor substrate at the bottom of the second openings (S105); and forming floating gates on the tunnel oxide layer (S106).
FIG. 2 illustrates a flash memory device formed by the process illustrated in FIG. 1. As shown in FIG. 2, the flash memory device includes a semiconductor substrate 100, and a floating gate silicon oxide layer 102 formed on the surface of the semiconductor substrate 100. The flash memory device also includes a floating gate 105 formed on the floating gate silicon oxide layer 102 and shallow trench isolation structures 101 with a portion formed in the surface of the semiconductor substrate 100 and the rest portion formed between adjacent floating gates 105. The surface of the floating gates 105 levels with the surface of the shallow trench isolation structures 101.
However, the performance of the flash memory device formed by the process illustrated in FIG. 1 needs further improvements. The disclosed device structures and methods are directed to solve one or more problems set forth above and other problems